Closing a Chip-Blocking Equivalence Problem to 0 NEQ
How I root-caused a hierarchical LEC failure everyone else had given up on, and shipped a FULL-EQ verdict with zero manual pin-constraints.
Engineering Notes
Case studies from 18+ years of chip design and infrastructure engineering — the debugging process, not just the result. Unlock individual articles for $5, or subscribe for $9/month unlimited — see Pricing.
Directing an AI Agent Through Production RTL, Not Just Autocomplete
What changes when you point an autonomous coding agent at real chip sign-off work instead of boilerplate — and what 20+ iterations on a production ISP module actually looked like.